mirror of
https://github.com/xivapi/ffxiv-datamining.git
synced 2026-07-26 19:59:10 +00:00
7.0
This commit is contained in:
+101
-1
@@ -754,7 +754,7 @@ int32,ScenarioType,uint16,Addon,QuestChapter,str,int32,uint32
|
||||
69601,0,712,0,47,"T_VER555_01_02",2,36520
|
||||
69602,0,713,0,47,"T_VER555_01_03",3,36530
|
||||
69893,0,714,0,48,"T_VER600_01_01",1,36710
|
||||
69894,0,715,5679,48,"T_VER600_01_02",2,36720
|
||||
69894,0,715,0,48,"T_VER600_01_02",2,36720
|
||||
69895,0,716,0,48,"T_VER600_01_03",3,36730
|
||||
69896,0,717,0,48,"T_VER600_01_04",4,36740
|
||||
69897,0,718,0,48,"T_VER600_01_05",5,36750
|
||||
@@ -911,3 +911,103 @@ int32,ScenarioType,uint16,Addon,QuestChapter,str,int32,uint32
|
||||
70287,0,866,0,58,"T_VER655_01_01",1,38370
|
||||
70288,0,867,0,58,"T_VER655_01_02",2,38380
|
||||
70289,0,868,0,58,"T_VER655_01_03",3,38390
|
||||
70396,0,869,0,59,"T_VER700_01_01",1,38400
|
||||
70397,0,870,0,59,"T_VER700_01_02",2,38410
|
||||
70398,0,871,0,59,"T_VER700_01_03",3,38420
|
||||
70399,0,872,0,59,"T_VER700_01_04",4,38430
|
||||
70400,0,873,5679,59,"T_VER700_01_05",5,38440
|
||||
70401,0,874,0,59,"T_VER700_01_06",6,38450
|
||||
70402,0,875,0,59,"T_VER700_01_07",7,38460
|
||||
70403,0,876,0,59,"T_VER700_01_08",8,38470
|
||||
70404,0,877,0,59,"T_VER700_01_09",9,38480
|
||||
70405,0,878,0,59,"T_VER700_01_10",10,38490
|
||||
70406,0,879,0,59,"T_VER700_01_11",11,38500
|
||||
70407,0,880,0,59,"T_VER700_01_12",12,38510
|
||||
70408,0,881,0,59,"T_VER700_01_13",13,38520
|
||||
70409,0,882,0,59,"T_VER700_01_14",14,38530
|
||||
70410,0,883,0,59,"T_VER700_01_15",15,38540
|
||||
70411,0,884,0,59,"T_VER700_01_16",16,38550
|
||||
70412,0,885,0,59,"T_VER700_01_17",17,38560
|
||||
70413,0,886,0,59,"T_VER700_01_18",18,38570
|
||||
70414,0,887,0,59,"T_VER700_01_19",19,38580
|
||||
70415,0,888,0,59,"T_VER700_01_20",20,38590
|
||||
70416,0,889,0,60,"T_VER700_02_01",1,38600
|
||||
70417,0,890,0,60,"T_VER700_02_02",2,38610
|
||||
70418,0,891,0,60,"T_VER700_02_03",3,38620
|
||||
70419,0,892,0,60,"T_VER700_02_04",4,38630
|
||||
70420,0,893,0,60,"T_VER700_02_05",5,38640
|
||||
70421,0,894,0,60,"T_VER700_02_06",6,38650
|
||||
70422,0,895,0,60,"T_VER700_02_07",7,38660
|
||||
70423,0,896,0,60,"T_VER700_02_08",8,38670
|
||||
70424,0,897,0,60,"T_VER700_02_09",9,38680
|
||||
70425,0,898,0,60,"T_VER700_02_10",10,38690
|
||||
70426,0,899,0,60,"T_VER700_02_11",11,38700
|
||||
70427,0,900,0,60,"T_VER700_02_12",12,38710
|
||||
70428,0,901,0,60,"T_VER700_02_13",13,38720
|
||||
70429,0,902,0,60,"T_VER700_02_14",14,38730
|
||||
70430,0,903,0,60,"T_VER700_02_15",15,38740
|
||||
70431,0,904,0,60,"T_VER700_02_16",16,38750
|
||||
70432,0,905,0,60,"T_VER700_02_17",17,38760
|
||||
70433,0,906,0,60,"T_VER700_02_18",18,38770
|
||||
70434,0,907,0,60,"T_VER700_02_19",19,38780
|
||||
70435,0,908,0,60,"T_VER700_02_20",20,38790
|
||||
70436,0,909,0,60,"T_VER700_02_21",21,38800
|
||||
70437,0,910,0,60,"T_VER700_02_22",22,38810
|
||||
70438,0,911,0,60,"T_VER700_02_23",23,38820
|
||||
70439,0,912,0,60,"T_VER700_02_24",24,38830
|
||||
70440,0,913,0,60,"T_VER700_02_25",25,38840
|
||||
70441,0,914,0,60,"T_VER700_02_26",26,38850
|
||||
70442,0,915,0,60,"T_VER700_02_27",27,38860
|
||||
70443,0,916,0,60,"T_VER700_02_28",28,38870
|
||||
70444,0,917,0,60,"T_VER700_02_29",29,38880
|
||||
70445,0,918,0,60,"T_VER700_02_30",30,38890
|
||||
70446,0,919,0,60,"T_VER700_02_31",31,38900
|
||||
70447,0,920,0,60,"T_VER700_02_32",32,38910
|
||||
70448,0,921,0,61,"T_VER700_03_01",1,38920
|
||||
70449,0,922,0,61,"T_VER700_03_02",2,38930
|
||||
70450,0,923,0,61,"T_VER700_03_03",3,38940
|
||||
70451,0,924,0,61,"T_VER700_03_04",4,38950
|
||||
70452,0,925,0,61,"T_VER700_03_05",5,38960
|
||||
70453,0,926,0,61,"T_VER700_03_06",6,38970
|
||||
70454,0,927,0,61,"T_VER700_03_07",7,38980
|
||||
70455,0,928,0,61,"T_VER700_03_08",8,38990
|
||||
70456,0,929,0,61,"T_VER700_03_09",9,39000
|
||||
70457,0,930,0,61,"T_VER700_03_10",10,39010
|
||||
70458,0,931,0,61,"T_VER700_03_11",11,39020
|
||||
70459,0,932,0,61,"T_VER700_03_12",12,39030
|
||||
70460,0,933,0,61,"T_VER700_03_13",13,39040
|
||||
70461,0,934,0,61,"T_VER700_03_14",14,39050
|
||||
70462,0,935,0,61,"T_VER700_03_15",15,39060
|
||||
70463,0,936,0,61,"T_VER700_03_16",16,39070
|
||||
70464,0,937,0,61,"T_VER700_03_17",17,39080
|
||||
70465,0,938,0,61,"T_VER700_03_18",18,39090
|
||||
70466,0,939,0,61,"T_VER700_03_19",19,39100
|
||||
70467,0,940,0,61,"T_VER700_03_20",20,39110
|
||||
70468,0,941,0,62,"T_VER700_04_01",1,39120
|
||||
70469,0,942,0,62,"T_VER700_04_02",2,39130
|
||||
70470,0,943,0,62,"T_VER700_04_03",3,39140
|
||||
70471,0,944,0,62,"T_VER700_04_04",4,39150
|
||||
70472,0,945,0,62,"T_VER700_04_05",5,39160
|
||||
70473,0,946,0,62,"T_VER700_04_06",6,39170
|
||||
70474,0,947,0,62,"T_VER700_04_07",7,39180
|
||||
70475,0,948,0,62,"T_VER700_04_08",8,39190
|
||||
70476,0,949,0,62,"T_VER700_04_09",9,39200
|
||||
70477,0,950,0,62,"T_VER700_04_10",10,39210
|
||||
70478,0,951,0,62,"T_VER700_04_11",11,39220
|
||||
70479,0,952,0,62,"T_VER700_04_12",12,39230
|
||||
70480,0,953,0,62,"T_VER700_04_13",13,39240
|
||||
70481,0,954,0,62,"T_VER700_04_14",14,39250
|
||||
70482,0,955,0,62,"T_VER700_04_15",15,39260
|
||||
70483,0,956,0,62,"T_VER700_04_16",16,39270
|
||||
70484,0,957,0,62,"T_VER700_04_17",17,39280
|
||||
70485,0,958,0,62,"T_VER700_04_18",18,39290
|
||||
70486,0,959,0,62,"T_VER700_04_19",19,39300
|
||||
70487,0,960,0,62,"T_VER700_04_20",20,39310
|
||||
70488,0,961,0,62,"T_VER700_04_21",21,39320
|
||||
70489,0,962,0,62,"T_VER700_04_22",22,39330
|
||||
70490,0,963,0,62,"T_VER700_04_23",23,39340
|
||||
70491,0,964,0,62,"T_VER700_04_24",24,39350
|
||||
70492,0,965,0,62,"T_VER700_04_25",25,39360
|
||||
70493,0,966,0,62,"T_VER700_04_26",26,39370
|
||||
70494,0,967,0,62,"T_VER700_04_27",27,39380
|
||||
70495,0,968,0,62,"T_VER700_04_28",28,39390
|
||||
|
||||
|
Reference in New Issue
Block a user